Multi-layer devices utilizing layer transfer

ABSTRACT

An apparatus is disclosed that includes a first plurality of devices made of a group III-V semiconductor material and a second plurality of devices made of a semiconductor material different than the material of the first plurality of devices that are bonded to the first plurality of devices. The apparatus also includes a dielectric layer surrounding the first plurality of devices and the second plurality of devices to mechanically bond the first plurality of devices to the second plurality of devices.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims benefit of U.S. Nonprovisional PatentApplication No. 13/627,425, “PROCESSES FOR MULTI-LAYER DEVICES UTILIZINGLAYER TRANSFER”, filed Sep. 26, 2012, and PCT Patent Application No.PCT/US13/61641, filed Sep. 25, 2013, which are incorporated by referenceherein in their entireties.

GOVERNMENT RIGHTS

This invention was made with Government support under Contract No.DE-AC04-94AL85000 awarded by the U.S. Department of Energy. TheGovernment has certain rights in the invention.

FIELD OF THE INVENTION

The present invention relates in general to semiconductor devices havingmultiple functionalities, in particular integrally formed semiconductordevices having microelectronic and optoelectronic applications.

ART BACKGROUND

Silicon wafers are used in the fabrication of integrated circuits (ICs)and other microelectronic systems (MEMS) devices. The wafer serves asthe substrate for fabrication of microelectronic devices built in andover the wafer. The wafer therefore undergoes many microfabricationprocess steps. Once the desired functionality is achieved, theindividual devices are separated and packaged.

Silicon wafers, however, have limited functionality. For example,silicon wafers can be fabricated for the purposes of digital or analogprocessing but are unable to efficiently serve as light emitters anddetectors. Rather light emitters and light detectors are typicallyfabricated from wafers made of compound semiconductor materials, such asgroup III-V semiconductor materials. In particular, compoundsemiconductor devices have stronger optical absorption, electricallydriven optical emission, high and low band-gaps and higher carriermobilities than silicon devices. Silicon devices, however, have theadvantage of high performance IC processing, materials andmicromachining technology.

In many microelectronic systems (MEMS) and optoelectronic applications,it is desirable to use compound semiconductor devices and silicondevices in combination. Combining the devices into one structure,however, has been challenging from a technical standpoint making itcommercially unfeasible.

SUMMARY OF THE INVENTION

A method for fabricating devices that are made of multiple layers ofdifferent semiconductor devices having different functionalities isdisclosed. The method may include forming a release layer over a donorsubstrate. A plurality of devices made of a first semiconductor materialcan be formed over the release layer. In one embodiment, the firstsemiconductor material can be a compound semiconductor material such asa III-V semiconductor material that can be used to form a device havingoptoelectronic functionalities. A first dielectric layer is formed overthe plurality of devices such that all exposed surfaces of the pluralityof devices are covered by the first dielectric layer. The plurality ofdevices can be attached to a receiving device made of a secondsemiconductor material different than or same as the first semiconductormaterial. The resulting device can be attached to a receiving substrate.In some embodiments, the receiving substrate is a silicon semiconductorstructure having devices that can be processed to have microelectronicand/or optoelectronic functionality. Once the devices are attachedtogether, the release layer can be etched to release the donor substratefrom the plurality of devices. A second dielectric layer can be appliedover the plurality of devices and the receiving substrate tomechanically attach the plurality of cells to the receiving substrate. Asecond plurality of cells made of a compound semiconductor material mayfurther be attached to the cells already bonded to the receivingsubstrate to provide further functionality to the resulting device.

In one embodiment, the resulting device may include a first plurality ofdevices made of a compound semiconductor material. The compoundsemiconductor material may be a III-V semiconductor material. A secondplurality of devices made of a semiconductor material different than thefirst plurality of devices can be bonded to the first plurality ofdevices. For example, the semiconductor material of the second pluralityof devices may be silicon. In addition, a dielectric layer may surroundthe first plurality of devices and the second plurality of devices tomechanically bond the first plurality of devices to the second pluralityof devices. The resulting device is therefore an integrated devicehaving the combined characteristics of a compound semiconductor and asilicon semiconductor.

The above summary does not include an exhaustive list of all aspects ofthe present invention. It is contemplated that the invention includesall systems and methods that can be practiced from all suitablecombinations of the various aspects summarized above, as well as thosedisclosed in the Detailed Description below and particularly pointed outin the claims filed with the application. Such combinations haveparticular advantages not specifically recited in the above summary.

BRIEF DESCRIPTION OF THE DRAWINGS

The embodiments of the invention are illustrated by way of example andnot by way of limitation in the figures of the accompanying drawings inwhich like references indicate similar elements. It should be noted thatreferences to “an” or “one” embodiment of the invention in thisdisclosure are not necessarily to the same embodiment, and they mean atleast one.

FIG. 1 schematically illustrates a cross-sectional view of oneembodiment of a donor substrate having a release layer formed thereon.

FIG. 2 schematically illustrates a cross-sectional view of oneembodiment of a compound semiconductor device layer formed on a releaselayer.

FIG. 3 schematically illustrates a cross-sectional view of oneembodiment of compound semiconductor device formed from a compoundsemiconductor device layer.

FIG. 4 schematically illustrates a cross-sectional view of oneembodiment of compound semiconductor devices covered with a dielectriclayer.

FIG. 5 schematically illustrates a cross-sectional view of oneembodiment of an etched dielectric layer.

FIG. 6 schematically illustrates a cross-sectional view of oneembodiment of compound semiconductor devices attached to a receivingdevice.

FIG. 7 schematically illustrates a cross-sectional view of oneembodiment in which a donor substrate is released from the compoundsemiconductor devices.

FIG. 8 schematically illustrates a cross-sectional view of oneembodiment of compound semiconductor devices attached to a receivingsubstrate.

FIG. 9 schematically illustrates a cross-sectional view of oneembodiment of a dielectric layer mechanically attaching the compoundsemiconductor devices to the receiving substrate.

FIG. 10 schematically illustrates a cross-sectional view of oneembodiment of a second set of devices attached to the compoundsemiconductor devices.

FIG. 11 schematically illustrates a cross-sectional view of oneembodiment of metal contacts applied to compound semiconductor devices.

FIG. 12 schematically illustrates a cross-sectional view of oneembodiment in which trenches are formed between devices of a receivingsubstrate.

FIG. 13 schematically illustrates a cross-sectional view of oneembodiment of a handle substrate attached to compound semiconductordevices.

FIG. 14 schematically illustrates a cross-sectional view of oneembodiment in which a completed device is released from a receivingsubstrate.

FIG. 15 schematically illustrates a cross-sectional view of oneembodiment in which receiving structure and compound semiconductordevices are attached to opposite sides of a receiving substrate.

FIG. 16 is a flow diagram of one embodiment of a method of processingdevices on a receiving substrate.

DETAILED DESCRIPTION

In this section we shall explain several preferred embodiments of thisinvention with reference to the appended drawings. Whenever the shapes,relative positions and other aspects of the parts described in theembodiments are not clearly defined, the scope of the invention is notlimited only to the parts shown, which are meant merely for the purposeof illustration. Also, while numerous details are set forth, it isunderstood that some embodiments of the invention may be practicedwithout these details. In other instances, well-known structures andtechniques have not been shown in detail so as not to obscure theunderstanding of this description.

FIG. 1 schematically illustrates a cross-sectional view of oneembodiment of a donor substrate. Donor substrate 102 may be any type ofdonor substrate capable of forming a semiconductor device thereon.Representatively, in one embodiment, donor substrate 102 is a wafer madeof a compound semiconductor material capable of creating a semiconductordevice made of a similar material. For example, donor substrate 102 ismade of a group III-V semiconductor material such that a semiconductordevice made of a III-V semiconductor material can be epitaxially grownthereon. In one embodiment, the III-V semiconductor material is acompound material such as gallium arsenide (GaAs) or indium galliumphosphide (InGaP). Although specific group III-V semiconductor materialsare disclosed, it is contemplated that any semiconductor material may beused. In still further embodiments, the donor substrate 102 may be madeof a non-compound semiconductor material capable of forming asemiconductor device thereon. For example, in one embodiment, donorsubstrate 102 is a non-compound material other than silicon, forexample, a group IV material such as silicon (Si) or germanium (Ge).

A sacrificial release layer 104 may be deposited on top of donorsubstrate 102. Release layer 104 may be made of any material capable ofbeing removed by an etchant that will not substantially remove aprotective layer formed on the semiconductor device. Representatively,in one embodiment, release layer 104 may be made of aluminum indiumphosphide (AlInP) and, during a later step, etched using hydrogenchloride (HCl). Alternatively, release layer 104 may be made of silicon(Si) and removed with xenon difluoride (XeF2). In still furtherembodiments, release layer 104 can be made of any material that isdifferent from the protective material, for example, amorphous-Si,porous silicon or spin-on glass. Release layer 104 may be grown overdonor substrate 102 using a molecular beam epitaxy (MBE) ormetallo-organic chemical vapor deposition (MOCVD) growth process.Alternatively, release layer 104 may be formed by other materialdeposition processes such as chemical vapor deposition (CVD) or physicalvapor deposition (PVD) (e.g. sputtering).

FIG. 2 schematically illustrates a cross-sectional view of oneembodiment of a device layer formed on donor substrate 102. Device layer202 may be formed on donor substrate 102 after the formation of releaselayer 104 such that release layer 104 is between compound device layer202 and donor substrate 102. Device layer 202 may be made of a compoundsemiconductor material, which in some embodiments, is the same materialas donor substrate 102. Representatively, donor substrate 102 may bemade of a III-V semiconductor material and device layer 202 may also bea III-V semiconductor material. In one embodiment, device layer 202 isgrown over donor substrate 102 using a molecular beam epitaxy (MBE) ormetallo-organic chemical vapor deposition (MOCVD) growth process.Alternatively, device layer 202 may be made of a single semiconductormaterial, for example a group IV semiconductor material such as Ge.Device layer 202 may be made of multiple layers or may be a single layerof semiconductor material. An overall thickness of compoundsemiconductor device layer 202 may be from about 0.5 μm to about 5 μm.

Once device layer 202 is formed, compound semiconductor devices 302 maybe formed from device layer 202 as illustrated in FIG. 3. Compoundsemiconductor devices 302, may be, for example, cells having the same ordifferent functionalities. Although devices 302 are referred to as“compound” devices, it is contemplated that compound semiconductordevices 302 are not necessarily made of compound materials. Rather,compound devices 302 may be made of a compound semiconductor material ora single semiconductor material, depending upon the material of devicelayer 202, as previously discussed. Compound semiconductor devices 302may be formed by etching trenches 304 down to release layer 104. Forexample, although not shown, a mask layer (e.g. an oxide layer) may beformed over device layer 202 and patterned to include openings overportions of device layer 202 where trenches 304 are to be formed. Achemical etch (e.g., wet etch or plasma etch) may then be performed toetch through device layer 202. Trenches 304 may extend through an entirethickness of device layer 202 and stop at release layer 202.Alternatively, trenches 304 may be etched through release layer 202.

Next, dielectric layer 402 is formed over compound semiconductor devices302 as illustrated in FIG. 4. Dielectric layer 402 may also be formedover portions of release layer 104 which are exposed between compoundsemiconductor devices 302. Dielectric layer 402 may be formed accordingto any suitable technique, for example, a plasma enhanced chemical vapordeposition technique.

Dielectric layer 402 serves several purposes. Representatively,dielectric layer 402 helps to bond compound semiconductor devices 302 toa receiving structure as will be described in more detail below. Also,as can be seen from FIG. 4, dielectric layer 402 covers all exposedsurfaces of compound semiconductor devices 302. Dielectric layer 402 cantherefore also serve as a passivation and sidewall protection layerduring etching of release layer 104 as will also be described in moredetail below. Dielectric layer 402 may be made of any type of materialsuitable for serving at least these purposes. Representatively, in oneembodiment, dielectric layer 402 may be made of silicon nitride orsilicon oxide. In one embodiment, dielectric layer 402 may be arelatively thin layer such that it does not substantially affect thepassage of light between compound semiconductor devices 302 and theassociated receiving structure. For example, dielectric layer 402 mayhave a thickness of from about 0.01 μm to about 1 μm. The thickness ofdielectric layer 402 may be selected depending upon the desiredcharacteristics of compound semiconductor devices 302. Representatively,a thinner layer may be selected where the optical characteristics ofcompound semiconductor devices 302 are critical and a thicker layer maybe selected where the electrical characteristics of compoundsemiconductor devices 302 are more important.

Portions of dielectric layer 402 between each of the compoundsemiconductor devices 302 are etched to expose release layer 104 asillustrated in FIG. 5. Representatively, in one embodiment, a maskinglayer is applied over compound semiconductor devices 302 and a chemicaletch (e.g., wet etch or plasma etch) is used to remove the unmaskedportions of dielectric layer 402. An example, of a masking layer is anoxide layer that is patterned such that portions of dielectric layer 402to be removed are exposed. Exposing release layer 104 facilitatesremoval of release layer 104 during a later processing step.

Once compound semiconductor devices 302 are formed on donor substrate102, donor substrate 102 and compound semiconductor devices 302 areflipped and bonded to the top of receiving structure 602 as illustratedin FIG. 6. Receiving structure 602 may be made of a material other thanthat of compound semiconductor devices 302. Representatively, wherecompound semiconductor devices are made of a III-V semiconductormaterial, receiving structure 602 may be made of silicon. Receivingstructure 602 may include receiving devices 610 formed therein which arealigned with and bonded to respective compound semiconductor devices302. Receiving devices 610 may be silicon semiconductor devices capableof a different functionality than compound devices 302. For example,receiving devices 610 may be fabricated to have microelectronicfunctionalities while compound semiconductor devices 302 can befabricated to have optoelectronic functionalities. More specifically, inone embodiment, compound semiconductor devices 302 may have the abilityto absorb, generate and modulate different wavelengths of light orgenerate a piezoelectric response to a mechanical input while receivingdevices 610 do not have such functionalities. A dielectric layer 608 maybe formed over each of receiving devices 610 to facilitate the bondingprocess.

The bonding process will now be described in more detail. In oneembodiment, a surface activation (plasma) process is performed oncompound semiconductor devices 302 according to recognized techniques. Asurface activation process may further be performed on receiving devices610. After the activation, compound semiconductor devices 302 arealigned and brought into contact with receiving devices 610. Chemicalbonding between compound semiconductor devices 302 and receiving devices610 occurs through hydrogen bonding and van der Waals forces between thedielectric layer 402 on compound semiconductor devices 302 and adielectric layer formed over receiving devices 610. In one embodiment,bonding occurs at room temperature. Representatively, room temperaturemay be considered a temperature of from about 15 to about 30 degreesCelsius, for example, from 20 to 25 degrees Celsius, or about 23 degreesCelsius. The ability to bond the devices together at room temperature isimportant because, in embodiments where dielectric layer 402 on compoundsemiconductor devices 302 and the dielectric layer on receiving devices610 are made of different materials (e.g. silicon dioxide and siliconnitride), the coefficient of thermal expansion between the dissimilarmaterials is not the same. Furthermore, the coefficient of thermalexpansion of the donor and receiving substrates may have differentcoefficients of thermal expansion which can cause problems with bondingif the bonding is not done at room temperature. In addition, typicalbonding procedures which occur at elevated temperatures can createstress on the device. The ability to bond at room temperature eliminatesthis stress.

It is recognized that for bonding to occur repeatedly and reliably, thesurfaces of compound semiconductor devices 302 and receiving devices610, having the dielectric layer formed thereon, should be cleaned (noparticulates) and smooth (less than a few nm rms roughness).

After the room temperature bonding step, a high temperature annealingprocess may be used to transform the bonds between the two surfaces intocovalent bonds. Representatively, the bonded compound semiconductordevices 302 and receiving devices 610 can be annealed by heating to atemperature between about 150 degrees Celsius and 600 degrees Celsius tostrengthen the bond.

In some embodiments, compound semiconductor devices 302 and receivingdevices 610 are clamped together under a mechanical load to facilitatethe bonding step. Alternatively, no external load is applied dependingon the characteristics of the material stack and coefficient of thermalexpansion (CTE) mismatches between compound semiconductor devices 302and receiving devices 610.

As further illustrated in FIG. 6, receiving structure 602 is attached toreceiving substrate 604 along a surface opposite compound semiconductordevices 302. An optional release layer 606 may further be formed betweenreceiving structure 602 and receiving substrate 604 to facilitateremoval of receiving substrate 604.

In one embodiment, receiving substrate 604 is a structured wafer thatincludes multiple through holes (e.g., holes 612) (not drawn to scale)that form a pattern on the top surface of receiving substrate 604. Eachof holes 612 extends vertically through the thickness of receivingsubstrate 604. In one embodiment, holes 612 can be formed with uniformspacing among them, with non-uniform spacing among them, or at randomlocations. Holes 612 can be of the same size or different sizes (e.g., adiameter in the range of 50-500 microns (μm)). In one embodiment,receiving substrate 604 is made of silicon or any silicon-basedmaterials. It is appreciated that receiving substrate 604 can be singlecrystalline or polycrystalline silicon. In alternative embodiments,receiving substrate 604 can be made of other materials such as ceramicmaterials. In one embodiment, various additional layers cover the entiresurface of receiving substrate 604. It is appreciated that the shape anddimensions of receiving substrate 604 will be dictated, in oneembodiment, by the requirements of receiving structure 602 adhered toreceiving substrate 604.

Receiving substrate 604 can be manufactured with standard semiconductorprocessing techniques. In one embodiment, receiving substrate 604 can beformed from a base wafer (e.g., a silicon wafer) with a hard maskdeposited thereon. An example of the hard mask is an oxide layer that ispatterned to define the size(s) and locations of holes 612. The hardmask exposes the part of the silicon wafer where holes 612 are to beformed. An etchant or a plasma process can then be used to etch throughthe silicon wafer to form holes 612. The hard mask is removed afterholes 612 are formed. A dielectric layer 614 (e.g., an oxide layerand/or a nitride layer) is formed on the entire exposed surface(including the inner surfaces of holes 612—i.e., the surface thatdefines the passage or lumen) of receiving substrate 604, as shown inFIG. 6. In one embodiment, dielectric layer 614 is a thin layer ofsilicon dioxide with a thickness in the range of 1000 Å-1 μm. It isnoted that receiving substrate 604 is formed prior to application ofreceiving structure 602. Still further, although a structured receivingsubstrate 604 is described and illustrated it is contemplated thatreceiving substrate 604 may be any standard, non-structured wafersuitable for processing of a receiving structure 602 and any associatedcomponents as described herein. For example, in another embodiment,receiving substrate 604 is solid, without through holes 612.

It is important to note that the features on the surfaces of compounddevices 302 and receiving devices 610 are critical to allow the hydrogengas that is evolving during the bonding process to escape and not causebonding defects. In particular, during the bonding process certain gases(e.g., hydrogen) may be generated at the surface-to-surface contact(“interface”) due to chemical reactions. If the gas is left at thisinterface, it will migrate and can turn into gas pockets. These gaspockets can become defects, which prevent bonding of the devices. Thethrough passages within receiving substrate 604 as described hereinprovide a route for the gas such that it can escape the interface.

Once compound semiconductor devices 302 are bonded to receiving devices610, release layer 104 is removed so that donor substrate 102 can beseparated from compound semiconductor devices 302 as illustrated in FIG.7. In one embodiment, a chemical etching process (e.g., wet etch orplasma etch) is used to remove release layer 104. In one embodiment, HClor XeF₂ can be used as an etchant. Since receiving devices 610 andcompound semiconductor devices 302 are coated all around their surfaceswith dielectric layers 608 and 402, respectively, which are made of amaterial that is not etched by the etchant, they are not affected by theetchant. Only release layer 104 is exposed to the etchant and will beetched away. The presence of the exposed surfaces between compoundsemiconductor devices 302 allows the etchant to reach release layer 104.It is further contemplated, that in some embodiments, to accelerate therelease process, donor substrate 402 may have a structure similar toreceiving substrate 604 such that there are holes through which theetchant can pass to reach release layer 104 from its bottom surface. Itis also contemplated that neither donor substrate 402 nor receivingsubstrate 604 is required to have through holes through which theetchant can pass to accomplish the etching

It should be understood that the choice of chemical composition of therelease layer 104 is selected so that etching of the release layer 104does not substantially attack or damage any other layers, particularly,dielectric layers 402, 608. Representatively, as previously discussed,release layer 104 may be made of aluminum indium phosphide (AlInP) andetched using hydrogen chloride (HCl). Alternatively, release layer 104may be made of silicon (Si) and removed with xenon difluoride (XeF₂).Both HCl and XeF₂ are selective etchants in that they will not removethe silicon nitride or oxide dielectric layers 402, 608.

In still further embodiments, release layer 104 can be made of spin-onglass, amorphous-Si or porous silicon and dielectric layer 402 can bemade of oxide. In other embodiments, release layer 104 is made of oxideand dielectric layer 402 can be made of amorphous-Si or Si-nitrite.

In one embodiment, after compound semiconductor devices 302 arereleased, donor substrate 102 can be cleaned for reuse. Compoundsemiconductor devices 302 remain attached to receiving devices 610 asillustrated in FIG. 8 with a bottom surface 802 exposed. A furtherdielectric layer 902 is then applied over each of compound semiconductordevices 302 and receiving structure 602 as illustrated in FIG. 9.Dielectric layer 902 may be substantially the same as dielectric layer402 and applied in a similar manner. Dielectric layer 902 covers exposedsurface 802 of compound semiconductor devices 302 such that all surfacesof compound semiconductor devices 302 are covered. Additionally,dielectric layer 902 acts to mechanically attach compound semiconductordevices 302 to receiving devices 610 to further reinforce the bondingbetween the two structures. In this aspect, the initial bonding strengthbetween compound semiconductor devices 302 and receiving devices 610does not need to be extremely high since a mechanical bonding step,through the encapsulation by dielectric layer 902, is also performed.Although the dielectric encapsulation is not a necessary part of theinvention for bond strength or utility of the bonded structures.

A second set of compound semiconductor devices 1002 may also be bondedto the first set of compound semiconductor devices 302 and covered witha further dielectric layer 1004 as illustrated in FIG. 10. Compoundsemiconductor devices 1002 may be formed and bonded to compoundsemiconductor devices 302 using substantially the same process stepspreviously discussed with reference to FIGS. 1-9. A representativeprocess flow for forming the cell stack shown in FIG. 10 is illustratedin FIG. 16. Representatively, process 1600 may include forming the firstplurality of devices (e.g., compound semiconductor devices 302) on afirst donor substrate (e.g., substrate 102)(block 1602). The firstplurality of devices can then be attached to a receiving structure(e.g., structure 602) as previously discussed (block 1604). Thereceiving structure may include receiving devices which are aligned withthe first plurality of devices. The first donor substrate can then beremoved from the first plurality of devices as previously discussed toexpose a surface of the first plurality of devices (block 1606). Thesecond plurality of devices are formed on a second donor substrate(block 1608) and then attached to the exposed surface of the firstplurality of devices (block 1610). The second plurality of devices canbe attached to the first plurality of devices using the chemical and/ormechanical bonding steps previously discussed in reference to FIGS. 8-9.Once the first plurality of devices and the second plurality of devicesare bonded together, the second donor substrate is removed (block 1612).Further processing may then be performed on the resulting device stack(e.g., compound semiconductor devices 302, devices 1002 and devices 610)to provide the desired functionality (block 1614).

The second set of compound semiconductor devices 1002 may be made of thesame material or a different material than compound semiconductordevices 302. Representatively, in one embodiment, compound semiconductordevices 302 and compound semiconductor devices 1002 may be made of thesame or different III-V semiconductor materials. For example, compoundsemiconductor devices 302 may be made of gallium arsenide (GaAs) andcompound semiconductor devices 1002 may be made of indium galliumphosphide (InGaP). Alternatively, one of compound semiconductor devices302 or compound semiconductor devices 1002 may be made of a group IVmaterial (e.g. germanium or silicon) while the other is made of acompound group III-V material. Alternatively, both may be made of thesame or a different group IV material.

Once the desired number of compound semiconductor devices are stackedand bonded to receiving structure 602, compound semiconductor devices302 and 1002 can be processed further, mostly with back-end of the lineprocesses (e.g., deposition/patterning of dielectrics and metals) tocomplete the desired device configuration. In one embodiment, thetemperatures used for the further processing should remain belowcritical levels (e.g., 250 degrees Celsius) to prevent disruption of thestack of compound semiconductor devices 302 and 1002.

For example, in one embodiment illustrated in FIG. 11, metal contacts1102 are deposited and patterned onto compound semiconductor devices 302and 1002. Metal contacts 1102 (e.g., solder bumps) can be formed on eachof compound semiconductor devices 302 and 1002 to connect compoundsemiconductor devices 302 and 1002 with a final receiving handlesubstrate 1302, as shown in FIG. 13. Handle substrate 1302 can be atemporary handle (e.g., a tape) or a final assembly substrate.

Prior to attaching devices 302, 610 and 1002 to handle substrate 1302,portions of receiving structure 602 between receiving devices 610 areremoved to form trenches 1202 as illustrated in FIG. 12. These portionsmay be removed through any of the previously discussed etching processes(e.g., a chemical etch).

At the end of device processing, receiving substrate 604 is removed torelease the resulting devices 1402 (i.e., receiving devices 610,compound semiconductor devices 302 and compound semiconductor devices1002), as shown in FIG. 14. In one embodiment, a chemical etchingprocess (e.g., wet etch or plasma etch) is used to remove release layer606. In one embodiment, xenon difluoride (XeF₂) can be used as anetchant. Since each of devices 610, 302 and 1002 have dielectric layers402, 902 and 1004 all around their surfaces, they are not affected bythe etchant. Only release layer 606 is exposed to the etchant and willbe etched away. The presence of holes 612 allows the etchant to reachrelease layer 606 from its bottom surface, in addition to its exposedside and/or edge surfaces. As a result, the release process can beaccelerated. In another embodiment, receiving substrate 604 is solid,without through holes 612, and the release etchant etches the releaselayer from the side and/or edge surfaces only.

After devices 1402 are released from receiving substrate 604 with handlesubstrate 1302, devices 1402 can be separated and re-assembled for aspecific configuration, without needing dicing or sawing of the parts.

In some embodiments, after release of the processed devices 1402,receiving substrate 604 can be made available for further reuse. Reusingreceiving substrate 604 reduces fabrication and materials costs. This isin contrast to a conventional wafer, which is consumed by the process ofdevice fabrication and cannot be reused.

The resulting devices 1402 are integrally formed devices that are madeof different materials having different functionalities.Representatively, devices 1402 can be devices having microelectronicfunctionalities typically associated with silicon semiconductor devicesas well as optoelectronic functionalities typically associated withcompound semiconductor devices. For example, devices 1402 may have thefunctionality of detectors, sensors, photovoltaic (PV) cells, integratedcircuits (ICs), micro-machine parts, micro-mechanical parts orelectronic components in combination with the light emitting and/ordetecting functionalities typically associated with compoundsemiconductor devices.

FIG. 15 schematically illustrates a cross-sectional view of anotherembodiment for forming a device in which compound devices are bonded toreceiving structure positioned along opposing sides of a receivingsubstrate. Representatively, each of the process steps and componentsdescribed in references to FIGS. 1-10, which were performed on a firstside 1502 of receiving substrate 604, may be duplicated and performed onsecond side 1504 of receiving substrate 604. In this aspect, in additionto the previously discussed components formed on first side 1502, secondside 1504 may have formed thereon release layer 1506, receiving device1508 having receiving devices 1510 and a stack of compound devices 1512and 1514 bonded to receiving devices 1510. Each of receiving devices1510 and compound devices 1512 and 1514 may be covered with dielectriclayer 1516. The resulting device stack 1501 formed on first side 1502and device stack 1503 formed on second side 1504 may be formedsimultaneously or one formed followed by formation of the other. Thefurther processing steps described in reference to FIGS. 11-14 may alsobe performed on device stack 1503 to form devices similar to devices1402.

While certain embodiments have been described and shown in theaccompanying drawings, it is to be understood that such embodiments aremerely illustrative of and not restrictive on the broad invention, andthat the invention is not limited to the specific constructions andarrangements shown and described, since various other modifications mayoccur to those of ordinary skill in the art. For example, althoughvarious process steps are described in a particular order, it iscontemplated that one or more of the steps may be performed in adifferent order. The description is thus to be regarded as illustrativeinstead of limiting.

What is claimed is:
 1. A method comprising: forming a release layer over a donor substrate; forming a plurality of devices made of a first semiconductor material over the release layer; applying a first dielectric layer over the plurality of devices such that all exposed surfaces of the plurality of devices are covered by the first dielectric layer; attaching the plurality of devices to a receiving structure made of a second semiconductor material, the receiving structure having a receiving substrate attached to a surface of the receiving structure opposite the plurality of devices; and etching the release layer to release the donor substrate from the plurality of devices.
 2. The method of claim 1 wherein the first semiconductor material is a group IV semiconductor material.
 3. The method of claim I wherein the first semiconductor material is different from the second semiconductor material and the first semiconductor material is a group III-V semiconductor material.
 4. The method of claim 1 wherein attaching comprises chemically bonding the plurality of devices to the receiving devices at room temperature.
 5. The method of claim 1 wherein the release layer is made of a material that can be etched using an etchant that does not substantially remove the first dielectric layer.
 6. The method of claim 1 wherein the release layer is made of AlInP and the etchant is HCl or the release layer is made of silicon and the etchant is XeF₂.
 7. The method of claim 1 wherein the plurality of devices are a first plurality of devices and the method further comprises: attaching a second plurality of devices to respective ones of the first plurality of devices.
 8. The method of claim 1 wherein the plurality of devices are a first plurality of devices and the receiving structure is a first receiving structure, and the method further comprises: attaching a second plurality of devices to a second receiving structure positioned along a surface of the receiving substrate opposite the first receiving structure.
 9. The method of claim 1 further comprising: applying a second dielectric layer over the plurality of devices and the receiving structure to mechanically attach the plurality of devices to the receiving structure; and depositing metal contacts on the plurality of devices.
 10. The method of claim 1 further comprising: attaching a handle substrate to the plurality of devices; and removing the plurality of devices and the receiving structure from the receiving substrate.
 11. The method of claim 1 wherein one of the donor substrate and the receiving substrate is a structured wafer having holes extending vertically through a thickness of the wafer.
 12. The method of claim 1 wherein one of the first dielectric layer and the second dielectric layer is from 0.01 μm to 1 μm.
 13. A method comprising: forming a donor device comprising a plurality of devices attached to a donor substrate, the plurality of devices made of a compound semiconductor material and positioned between a release layer formed over the donor substrate and a first dielectric layer formed over the plurality of devices; attaching the plurality of devices to a receiving device at room temperature, the receiving structure having a plurality of receiving devices made of a different material than the plurality of devices and attached to a receiving substrate at a side opposite the plurality of devices; and etching the release layer to release the plurality of devices from the donor substrate, wherein the etchant selectively removes the release layer without substantially removing the first dielectric layer.
 14. The method of claim 13 wherein the first semiconductor material is a group III-V semiconductor material.
 15. The method of claim 13 wherein attaching comprises bonding the plurality of devices to the receiving structure at room temperature.
 16. The method of claim 13 wherein the release layer is made of AlInP and the etchant is HCl or the release layer is made of silicon and the etchant is XeF₂.
 17. The method of claim 13 wherein the plurality of devices are a first plurality of devices and the method further comprises: after applying the second dielectric layer, attaching a second plurality of devices to respective ones of the first plurality of devices.
 18. The method of claim 13 further comprising: adding functionality to the plurality of devices, the functionality being different than a functionality of the receiving devices.
 19. The method of claim 13 further comprising: applying a second dielectric layer over the plurality of devices and the receiving structure to cover any exposed surfaces of the plurality of devices and mechanically attach the plurality of devices to the receiving devices; attaching a handle substrate to the plurality of devices; and removing the plurality of devices and the receiving structure from the receiving substrate
 20. An apparatus comprising: a first plurality of devices made of a group III-V semiconductor material; a second plurality of devices made of a semiconductor material different than the material of the first plurality of devices, wherein the second plurality of devices are bonded to the first plurality of devices; and a dielectric layer surrounding the first plurality of devices and the second plurality of devices to mechanically bond the first plurality of devices to the second plurality of devices. 